Technologies

In June of 2005, UMC became the first foundry in the world to deliver 65nm customer products. UMC's 65nm technology supports high performance (65SP) and low power (65LL/65LP) requirements for a broad range of mainstream applications.

UMC's 65-nanometer SoC solution begins with a flexible technology design platform. Customers are able to choose the process device options that are optimized for their specific application, such as Standard Performance (SP), Low Leakage (LL) or Low Power (LP) transistors. The high performance characteristics of UMC's 65nm SP process enable designers to utilize the technology to power a broad range of applications from consumer products to graphics ICs. Technology options can also be implemented including mixed signal/RFCMOS to further customize the process.

UMC's 55nm standard performance process (55SP) is a 90% shrink from the 65nm node (65SP), providing customers with smaller die size while maintaining the same performance with similar or lower power. In addition to this standard performance platform (55SP), we also provide a Low Power platform (55LP) and an Ultra Low Power platform (55uLP) options that are compatible with the industry standard processes. All of these platforms are ample capacity and high yield maturity.